As an ASIC Physical Design DFT Engineer at Micron Technology, Inc., you will be involved with the DFT(Design for Test) implementation for high speed, complex integrated circuit designs. You will be tasked with understanding digital and analog design elements and implement DFT structures and architectures . You will have the opportunity to contribute to all aspects of DFT, from architecture phase till post silicon bring up and yield enhancements.
Successful candidates for this position will have:
B. Tech. / M. Tech with 4-8 years IC design experience specifically in the Design For Test (DFT) aspects.
Experience in Scan Insertion, ATPG generation, Scan timing closure and Physical design aspects of DFT
Experience in MBIST logic generation , verification and constraints.
ATPG pattern generation, gate level simulation and debug
Work with PE/TE post silicon for DFT bring up and yield enhancement.
Ability to understand advanced digital design architectures and clocking structures to help manage Scan/MBIST/DFT timing and physical design constraints
Ability to work with digital and analog circuit designers to analyze and explore DFT options for complex designs integrating standard cell logic with high speed custom interface circuits
Expertise in Synopsys/Mentor Scan/Test compression/MBIST tools required
Experience with physical design methodologies and TCL/perl/python scripting is required
Previous digital design and RTL coding experience a plus
Strong communication skills, with the ability to convey complex technical concepts to other design peers in verbal and written form
A high level of self-motivation and the ability to be a self-starter
Salary: Not Disclosed by Recruiter
Industry:IT-Software / Software Services
Functional Area:IT Software - Application Programming, Maintenance
Role Category:Programming & Design
Role:Team Lead/Technical Lead
Desired Candidate Profile
Apogee Services Private Limited
Recruiter Name:Meenu Srivastav
Contact Company:Apogee Services Private Limited